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Post Silicon Validation Engineer

Vankay SystemsCA🇺🇸United StatesPosted Sep 22, 2026

Quick Overview

Seniority
Mid Senior
Work mode
Hybrid
Location
CA, United States
Posted
21 hours ago
FPGA

Job Description

Job Description:
Validate display SOC, Mixed Signal SOC, and IP. (good)
Define validation strategy and test plans for new IP blocks, aligning with RTL, architecture, FW. (good)
Develop silicon validation infrastructure and coding C/C++ and Python for emulation (Zebu), FPGA (HAPS), and first silicon platforms. Identify risks and develop mitigation strategies. (Good)
Execute bring-up/debug, workload enablement, and SW stack validation. (Must)
Perform performance and power characterization. (Must)
Create automated data collection flows and convert large datasets into executive summaries. (Must)
Track test coverage, document bugs, drive cross-functional debug, and verify silicon fixes. (Must)
Participate in design reviews and provide recommendations to strengthen validation coverage. (Good)
Collaborate with factory test teams to align validation and production characterization strategies. (Must)


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