Senior System Signal Integrity Engineer

Summary

OSI Engineering is partnering with our client to find an experienced Senior System Signal Integrity Engineer to support the development of next-generation consumer device products. This is an exciting opportunity to work on cutting-edge high-speed digital designs, collaborating with world-class engineering teams responsible for delivering industry-leading hardware.

If you''re passionate about signal integrity, high-speed interfaces, and solving complex system-level challenges, this role offers the opportunity to make a direct impact on products used by millions around the world.

Responsibilities

• Perform system-level Signal Integrity (SI) design, analysis, and validation for next-generation Mac products.
• Analyze and optimize high-speed SerDes links, including transmitter and receiver equalization techniques such as FFE, CTLE, DFE, VGA gain, CDR behavior, link training algorithms, and internal eye margining.
• Support signaling technologies including NRZ, PAM3, and PAM4.
• Conduct statistical channel analysis across multiple channel variants and validate end-to-end link performance.
• Review PCB and flex layouts, including trace routing, impedance control, and return path analysis.
• Develop and evaluate interconnect models using S-parameters, W-elements, and other modeling techniques.
• Perform channel modeling and simulation using industry-standard SI tools.
• Support compliance testing and passive channel/component characterization for high-speed interfaces.
• Perform system-level transient analysis using IBIS-AMI, HSPICE, Spectre, AMS, Simplis, and related simulation models.
• Utilize measurement equipment including Vector Network Analyzers (VNA) and Time Domain Reflectometry (TDR) for validation, calibration, and de-embedding.
• Develop scripts using Matlab, Python, Perl, or similar languages to improve engineering workflows.
• Create clear technical documentation and collaborate effectively with cross-functional engineering teams.

Requirements

• Strong system-level Signal Integrity experience supporting high-speed digital designs.
• Deep understanding of SerDes architectures, including:
  • FFE
  • CTLE
  • DFE
  • VGA Gain
  • Clock Data Recovery (CDR)
  • Link training algorithms
  • Internal eye margining
• Experience working with NRZ, PAM3, and PAM4 signaling technologies.
• Expertise with industry-standard interfaces including:
  • USB4
  • USB3.1 / USB2
  • PCIe
  • Thunderbolt
  • DisplayPort
  • HDMI
  • MIPI
  • Ethernet
  • SD
• Experience supporting parallel interfaces such as:
  • DDR
  • LPDDR
  • GDDR
  • NAND
  • Other synchronous interfaces
• Strong understanding of transmitter and receiver compliance testing.
• Experience with PCB materials, flex materials, connector design, and high-speed interconnect design.
• Proficiency with SI simulation tools such as:
  • Ansys HFSS
  • Keysight ADS
  • SIwave
  • PowerSI
• Working knowledge of:
  • IBIS-AMI
  • HSPICE
  • Spectre
  • AMS
  • Simplis
• Experience using laboratory measurement equipment including VNA and TDR is preferred.
• Programming or scripting experience using Matlab, Python, Perl, or similar languages is preferred.
• Excellent communication, documentation, and problem-solving skills.
• Ability to work independently while collaborating effectively with cross-functional engineering teams.

Education

• Ph.D. preferred with 3+ years of relevant industry experience, or
• Master''s degree required with 5+ years of relevant industry experience.

Location

Hybrid — Cupertino, CA or Austin, TX

Duration

12-month contract

Salary Range

$78-$88 DOE

Interested?

Submit your resume to .