Post Silicon Validation Engineer''s (Only W2)

• Salary: maximum of 105K+ benefits (Flexible)
• 100% onsite in Santa Clara  

Post Silicon Validation Engineering

• BS Degree in EE with one or two years of experience
• Knowledge of board bring up, HW troubleshooting skills and board testing as per the test plan
• Familiarity of working in lab environment in electrical measurements of different IO interfaces(PCIE, USB, HMDI and I2C/SPI) and using Test Equipment like Oscilloscope, DAQ, Multi-meter, Power Supply and Logic analyser
• Ability to read schematics and familiar with layout files (*.brd file using Cadance Allegro tool)
• Knowledge of Basic Linux commands and understanding the execution flow of Python/bash scripts
• Knowledge to assemble a x86 motherboard (e.g., connect SMPS, DRAM cards, PCIe, display, other peripherals, etc. to x86 motherboard)
• Knowledge and hands-on experience on Silicon PVT characterization
• Good communication and problem-solving skills, basic knowledge of common office software (Outlook, Excel, Word)