Physical Design Engineer

Hi,

Job Title: Physical Design Engineer (PnR / PPA / Timing Closure)
Location : Mountain View, CA

Responsibilities:

We are looking for a Physical Design Engineer with strong expertise in Place & Route (PnR), Power-Performance-Area (PPA) optimization, and timing convergence for advanced technology nodes.

Preferred Qualifications:

• Bachelor's or Master's degree in Electrical/Electronics Engineering.
• Experience in advanced nodes (7nm/5nm/3nm preferred).
• Strong debugging and problem-solving skills.
• Experience working with cross-functional silicon teams.
  
  

  Thanks & Regards..,

  Arun Prasath
  
  
  Reveille Technologies, Inc