RTL Verification Engineer

We are seeking a Senior RTL Verification Engineer with strong SoC-level verification experience. The ideal candidate will have hands-on expertise in verifying complex SoC designs, with a strong background in one or more of the following areas: Reliability, Availability & Serviceability (RAS), cache/memory coherency, or hardware security.

The candidate should be experienced in developing and executing verification strategies for complex RTL/IP blocks and SoC-level environments.

Senior RTL Verification Engineer – SoC

Location: Santa Clara, CA
Engagement: Contract
Experience: 8 – 12 Years Max

Key Responsibilities

• Develop and execute RTL verification strategies and test plans for complex SoC designs.
• Perform SoC-level functional verification of CPU, memory, interconnect, cache, and peripheral subsystems.
• Work on verification of RAS, coherency, and/or security features.
• Develop and maintain SystemVerilog/UVM-based verification environments, testbenches, sequences, and test scenarios.
• Create functional and constrained-random tests to achieve comprehensive coverage.
• Develop assertions and coverage models and analyze functional/code coverage.
• Debug RTL and simulation failures and work closely with RTL/design engineers to identify and resolve issues.
• Participate in verification planning, regression execution, coverage closure, and sign-off activities.
• Collaborate with architecture, design, firmware, and validation teams throughout the SoC development lifecycle.

Required Qualifications

• 8+ years of experience in ASIC/SoC RTL verification.
• Strong hands-on experience with SystemVerilog and UVM.
• Proven experience with SoC-level verification of complex designs.
• Strong understanding of digital design, RTL, verification methodologies, and simulation/debug.
• Experience in one or more of the following:
• RAS (Reliability, Availability & Serviceability)
• Cache/Memory/Interconnect Coherency
• Hardware/SoC Security
• Experience with functional coverage, assertions, constrained-random verification, and regression.
• Strong debugging and problem-solving skills.
• Experience working with cross-functional semiconductor engineering teams.

Preferred Qualifications

• Experience verifying CPU/compute SoCs, interconnects, cache/memory subsystems, or complex IPs.
• Experience with industry-standard simulation and debug tools.
• Knowledge of formal verification is a plus.
• Experience with Python, C/C++, or scripting for verification automation is a plus.
• Semiconductor/CPU/SoC product development experience preferred.

Ideal Candidate Profile

The client is specifically looking for a SoC-level RTL Verification Engineer, rather than someone focused only on block/IP-level verification. Candidates with strong expertise in RAS, coherency, or security verification will be particularly relevant.