DFT Engineer

Looking for a senior DFT Engineer with 8–12 years of relevant experience in Scan Insertion and ATPG Validation, with hands-on experience using Mentor Tessent and Synopsys DFT Compiler.

DFT Scan Insertion / ATPG Validation Engineer

Location: Santa Clara, CA
Duration: 12 Months

Experience: 8–12 years

Required Skills:

• Strong experience in DFT Scan Insertion
• Hands-on experience with ATPG Validation
• Strong understanding of DFT methodologies, scan architecture, and ATPG flows

Required Tools:

• Mentor Tessent (Siemens)
• Synopsys DFT Compiler