Quick Overview
Job Description
Job Responsibilities
- Architectural & Performance Leadership: Lead performance engineering initiatives across next-generation server platforms, optimizing compute and memory subsystems for mission-critical enterprise and cloud workloads.
- Large-Scale System Optimization: Collaborate across cross-functional teams to design, develop, validate, launch, monitor, and troubleshoot server infrastructure at scale, maintaining peak hardware performance within defined thermal and power envelopes.
- Silicon & Platform Bring-Up: Drive end-to-end bring-up of new CPU/GPU architectures and server hardware platforms from early engineering samples through volume production deployment.
- Vendor & Industry Influence: Partner closely with key silicon suppliers (CPU, GPU, memory, and accelerator vendors) and standards organizations (e.g., JEDEC) to align, influence, and co-design future technology roadmaps.
- Root-Cause Analysis & Debugging: Perform deep-dive root-cause analysis of complex hardware and low-level software interactions, addressing performance regressions, hardware degradation, memory bottlenecks, and reliability issues across enterprise fleets.
- Telemetry & Statistical Analysis: Leverage large-scale telemetry data, hardware diagnostic logs, and statistical analysis tools to proactively identify trends, model platform behavior, and validate system stability.
- Cross-Functional Communication: Serve as a technical authority, regularly presenting technical designs, features, and performance tradeoffs to cross-functional engineering teams, users, and senior executive management.
Job Description:
- Functional Validation: Demonstrated experience in developing functional specifications, design verification plans, and functional test procedures.
- System-Level Debugging: 5+ years of experience identifying and root-causing complex hardware and low-level software issues in large-scale distributed systems.
- Performance Troubleshooting: 5+ years of experience providing technical support and debugging/root-causing CPU and memory performance issues across successive hardware generations.
- Subsystem Architecture: 5+ years of hands-on experience in CPU/memory architecture, cache hierarchies, interconnect protocols, and subsystem design.
Preferred Qualifications
- New Architecture Bring-Up: 5+ years of direct experience with new CPU/GPU architecture bring-up and platform enablement.
- Data-Driven Analysis: 5+ years of experience utilizing statistical analysis methods on large-scale platform diagnostic and telemetry data.
- Industry Standards & Resilience: 5+ years of experience leading or contributing to memory standardization (JEDEC, DDR4/DDR5, HBM), CPU architecture, Reliability/Availability/Serviceability (RAS) design, system performance, security, and hardware troubleshooting.
- Technical Project Leadership: Proven track record of successfully leading architecturally significant technical projects from inception through production launch, including requirement gathering, cross-team alignment, and technical design documentation.
Education: Bachelor's or Master’s degree in Computer Science, Computer or Electrical Engineering, Mathematics, or a related field.
GlobalLogic estimates the starting pay range for this role to be performed in Austin, TX to be $140,000 to $150,000 and reflects base salary only. This pay range is provided as a good-faith estimate, and the amount offered may be higher or lower. GlobalLogic takes many factors into consideration in making an offer, including candidate qualifications, work experience, operational needs, travel and onsite requirements, internal peer equity, prevailing wage, responsibilities, and other market and business considerations.
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