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Full timeEngineering

Principal HS Digital Place & Route Engineer (d/m/f)

ams Italy S.r.l.Pavia, Lombardy🇮🇹Italy

Why this role stands out

As a Principal HS Digital Place & Route Engineer, you'll be a technical authority shaping the physical implementation of high-speed ICs, driving innovation and mentoring a team. This hybrid role offers significant growth potential and the chance to make a substantial impact at a reputable company, making it an excellent opportunity for experienced engineers seeking leadership and advanced challenges.

Quick overview

SeniorityLeader
Employment typeFull Time
Work modeHybrid
LocationPavia, Lombardy, Italy

Job description

Your tasks

  • Technical expert and recognized authority for physical implementation of high-speed digital and mixed-signal ICs
  • Lead place-and-route implementation from synthesis results through PnR to sign-off and tape-out
  • Define, deploy, and maintain digital backend methodologies, flows, and best practices
  • Drive timing closure, power, performance, area (PPA), signal integrity, EM/IR and physical verification strategies
  • Mentor and develop engineers within the digital backend community
  • Lead EDA tool evaluations, methodology improvements, and flow automation initiatives
  • Support technology enablement for advanced CMOS nodes including FinFET and FD-SOI
  • Provide technical leadership across multiple projects and business units
  • Act as interface to foundries, EDA vendors, and methodology teams
  • Drive continuous improvement of backend design efficiency and quality

Who we are looking for

  • MSc or PhD in Electrical Engineering, Microelectronics, or related field
  • 10+ years of experience in digital physical implementation and backend design
  • Proven expertise with industry-standard physical design tools and flows (Cadence EDA flow preferred)
  • Strong knowledge of floorplanning, placement, CTS, routing, STA, physical verification, power integrity, and signal integrity analysis
  • Extensive experience with timing closure and sign-off methodologies
  • Experience with high-speed interfaces such as UCIe, PCIe, DDR, SerDes, USB, MIPI, or similar protocols is highly desirable
  • Experience driving methodology development and engineering best practices across multiple projects
  • Strong communication, collaboration, mentoring, and technical leadership skills
  • Ability to work independently and influence technical decisions at organizational level
ams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities.

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