Verilog Jobs: page 20
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Page 20 of 20.
- AI

Senior Mission Software Engineer, EWRecently posted Auto Apply
Anduril Industries · Costa Mesa · Hybrid 🇺🇸
DockerMATLABRust+11Technology$191k - $253k/yr - AI

Digital Design Engineer, Air Dominance and StrikeRecently posted Auto Apply
Anduril Industries · Costa Mesa · Hybrid 🇺🇸
Embedded SystemsFPGAVHDL+2Engineering$146k - $194k/yr - AM

Sr. Staff Engineer - Digital Design Verification Auto Apply
Ambiq Micro, Inc. · Austin · Hybrid 🇺🇸
CSSC++IoT+3TechnologySalary not listed - AM

Sr. Staff SoC RTL Engineer Auto Apply
Ambiq Micro, Inc. · Austin · Hybrid 🇺🇸
Edge ComputingFPGAIoT+1EngineeringSalary not listed - AM

Principal SoC RTL Engineer Auto Apply
Ambiq Micro, Inc. · Austin · Hybrid 🇺🇸
FPGAIoTVerilog+1EngineeringSalary not listed - OP

RTL Design Engineer – Interconnect & Network Datapath Auto Apply
Openai · San Francisco · Hybrid 🇺🇸
FPGAArbitrationBackground Checks+4Salary not listed - OP

Hardware Tools Engineer Auto Apply
Openai · San Francisco · Hybrid 🇺🇸
VerilogGenerative AIEngineeringSalary not listed - OL

AMS Engineer Auto Apply
Olix · Austin · On-site 🇺🇸
VerilogEngineeringSalary not listed - OL

Senior/Staff Analog Design Engineer - SerDes Auto Apply
Olix · Austin · On-site 🇺🇸
VerilogEngineeringSalary not listed - OL

Senior/Staff Design for Test Engineer Auto Apply
Olix · Austin · On-site 🇺🇸
PythonVHDLVerilogTechnologySalary not listed - OL

Senior/Staff Digital Design Engineer Auto Apply
Olix · Austin · On-site 🇺🇸
FPGASimulinkVHDL+1EngineeringSalary not listed - NO

FPGA Engineer Auto Apply
Northwoodspace · Torrance · Hybrid 🇺🇸
FPGAVerilogEngineeringSalary not listed - NE

Member of Technical Staff, ASIC Design Auto Apply
Netpreme · Santa Clara · On-site 🇺🇸
Stakeholder ManagementLLMMental Health+2Salary not listed - LU

IC Design Verification Engineer Auto Apply
Lumilens · San Jose · Hybrid 🇺🇸
FPGAVerilogEngineeringSalary not listed - LU

Verification Lead (Lead DV) Auto Apply
Lumilens · San Jose · Hybrid 🇺🇸
FPGAComplianceLever+2Salary not listed - LS

Senior FPGA/ASIC Modem Engineer Auto Apply
Logos Space · Mountain View · On-site 🇺🇸
5GFPGAVHDL+1EngineeringSalary not listed - NG

Staff Radar Modeling Simulation Analysis Systems Engineer with Security ClearanceRecently posted
Northrop Grumman · Baltimore, MD · On-site 🇺🇸
SAFeMATLABShell+9Technology$169k - $253.6k/yr - HA

Research Engineer, Formal Methods Auto Apply
Harmonic · Palo Alto · Hybrid 🇺🇸
VerilogEngineeringSalary not listed - HA

Formal Verification Engineer Auto Apply
Harmonic · Palo Alto · On-site 🇺🇸
VerilogEngineeringSalary not listed - HA

Software Engineer, Product Auto Apply
Harmonic · Palo Alto · On-site 🇺🇸
GraphQLPythonVerilog+3TechnologySalary not listed - HA

Software Engineer, ML Systems Auto Apply
Harmonic · Palo Alto · On-site 🇺🇸
DockerGCPAWS+7TechnologySalary not listed - HA

Research Engineer, Training & Inference Auto Apply
Harmonic · Palo Alto · On-site 🇺🇸
VerilogEngineeringSalary not listed - HA

Research Engineer Auto Apply
Harmonic · Palo Alto · On-site 🇺🇸
VerilogEngineeringSalary not listed - HA

Software Engineer Auto Apply
Harmonic · Palo Alto · On-site 🇺🇸
GCPAWSC+++4TechnologySalary not listed - EX

Hardware Systems Engineer Auto Apply
Extropic · Boston · On-site 🇺🇸
FPGAPythonVHDL+1TechnologySalary not listed - ET

DFT (Design For Test) Engineer Auto Apply
Etched · San Jose · On-site 🇺🇸
VerilogEngineeringSalary not listed - ET

MTS, Inference Performance Visibility Auto Apply
Etched · San Jose · On-site 🇺🇸
RustEmbedded SystemsC+++5Salary not listed - ET

Design Verification Engineer - Interface IP Auto Apply
Etched · San Jose · On-site 🇺🇸
VerilogEngineeringSalary not listed - ET

ASIC Architect Auto Apply
Etched · San Jose · On-site 🇺🇸
RustC++Mental Health+2Salary not listed - ET

Emulation Engineer, Hardware Prototyping (HAPS) Auto Apply
Etched · San Jose · On-site 🇺🇸
FPGAVerilogEngineering$150k - $275k/yr
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