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Analog circuit design engineer

Weekday AIHyderabad, Telangana๐Ÿ‡ฎ๐Ÿ‡ณIndiaPosted 14 Oct 2026

Quick Overview

Seniority
Mid Senior
Employment type
Full Time
Work mode
On Site
Location
Hyderabad, Telangana, India
Posted
20 hours ago
Compliance

Job Description

๐—ง๐—ต๐—ถ๐˜€ ๐—ฟ๐—ผ๐—น๐—ฒ ๐—ถ๐˜€ ๐—ณ๐—ผ๐—ฟ ๐—ผ๐—ป๐—ฒ ๐—ผ๐—ณ ๐˜๐—ต๐—ฒ ๐—ช๐—ฒ๐—ฒ๐—ธ๐—ฑ๐—ฎ๐˜†'๐˜€ ๐—ฐ๐—น๐—ถ๐—ฒ๐—ป๐˜๐˜€

๐—ฆ๐—ฎ๐—น๐—ฎ๐—ฟ๐˜† ๐—ฟ๐—ฎ๐—ป๐—ด๐—ฒ: ๐—ฅ๐˜€ ๐Ÿญ๐Ÿฑ๐Ÿฌ๐Ÿฌ๐Ÿฌ๐Ÿฌ๐Ÿฌ - ๐—ฅ๐˜€ ๐Ÿฏ๐Ÿฑ๐Ÿฌ๐Ÿฌ๐Ÿฌ๐Ÿฌ๐Ÿฌ (๐—ถ๐—ฒ ๐—œ๐—ก๐—ฅ ๐Ÿญ๐Ÿฑ-๐Ÿฏ๐Ÿฑ ๐—Ÿ๐—ฃ๐—”)

Experience: 3+ yrs

Location: Bengaluru, Karnataka, India, Hyderabad, Telangana, India

We are looking for a skilledย Analog Circuit Design Engineerย with hands-on experience in analog and mixed-signal integrated circuit design. The ideal candidate will have strong technical expertise inย Phase-Locked Loops (PLL), SerDes, FinFET technologies, and physical verification processes, including Layout Versus Schematic (LVS) and Design Rule Checks (DRC).

This role involves designing, analysing, verifying, and optimising high-performance circuits for advanced semiconductor applications. You will collaborate with cross-functional engineering teams to develop robust, power-efficient, and high-speed circuit solutions while ensuring design accuracy, reliability, and compliance with technology-specific requirements.

Key Responsibilities

  • Design, analyse, and optimise analog and mixed-signal circuits for advanced semiconductor applications.
  • Develop and verifyย PLL circuits, focusing on frequency generation, clocking performance, stability, and jitter characteristics.
  • Contribute toย SerDes circuit designย for high-speed data transmission and signal integrity.
  • Perform transistor-level circuit simulations and analyse performance across process, voltage, and temperature (PVT) variations.
  • Work withย FinFET technologyย and understand its impact on circuit behaviour, power consumption, and performance.
  • Collaborate with layout engineers to ensure accurate implementation of circuit designs.
  • Perform and debugย LVS and DRC checks, resolving schematic-to-layout mismatches and design rule violations.
  • Support post-layout simulation, parasitic analysis, and circuit performance optimisation.
  • Investigate circuit functionality, timing, noise, power, and reliability issues.
  • Participate in design reviews and collaborate with cross-functional engineering teams.
  • Maintain design documentation, simulation results, verification reports, and technical specifications.
  • Follow established semiconductor design methodologies, verification standards, and quality practices.

What Makes You a Great Fit

  • 3+ years of experienceย in analog or mixed-signal integrated circuit design.
  • Strong understanding of analog circuit fundamentals, transistor-level design, and semiconductor device characteristics.
  • Hands-on experience withย PLL design and/or SerDes circuit development.
  • Knowledge ofย FinFET process technologiesย and advanced-node semiconductor design considerations.
  • Practical experience withย LVS, DRC, and physical verification workflows.
  • Familiarity with circuit simulation tools such as Cadence Virtuoso, Spectre, or HSPICE.
  • Understanding of PVT analysis, post-layout simulation, parasitic effects, and circuit optimisation.
  • Strong debugging, analytical, and problem-solving skills.
  • Ability to collaborate effectively with circuit design, layout, and verification teams.
  • A Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, VLSI, or a related discipline is preferred.