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Elect Design and Analy Engr 4
Judge Group, Inc.El Segundo, CA🇺🇸United StatesPosted 16 Jul 2026
Quick Overview
Salary
$75 - $80/hr
Work Type
On Site
Level
Mid Senior
Job Description
Location: El Segundo, CA Salary: $75.00 USD Hourly - $80.00 USD Hourly Description:
ASIC/FPGA Verification Engineer
Hybrid - 1 day onsite per week
El Segundo, CA
Overview
We are seeking experienced ASIC/FPGA Verification Engineers to join a high-performing electronic products team developing advanced digital ICs and SoCs for mission-critical applications. In this role, you will contribute to the verification of complex ASIC and FPGA designs, working closely with cross-functional engineering teams to ensure high-quality, reliable hardware solutions.
Key Responsibilities
By providing your phone number, you consent to: (1) receive automated text messages and calls from the Judge Group, Inc. and its affiliates (collectively "Judge") to such phone number regarding job opportunities, your job application, and for other related purposes. Message & data rates apply and message frequency may vary. Consistent with Judge's Privacy Policy, information obtained from your consent will not be shared with third parties for marketing/promotional purposes. Reply STOP to opt out of receiving telephone calls and text messages from Judge and HELP for help.
Contact:
This job and many more are available through The Judge Group. Please apply with us today!
ASIC/FPGA Verification Engineer
Hybrid - 1 day onsite per week
El Segundo, CA
Overview
We are seeking experienced ASIC/FPGA Verification Engineers to join a high-performing electronic products team developing advanced digital ICs and SoCs for mission-critical applications. In this role, you will contribute to the verification of complex ASIC and FPGA designs, working closely with cross-functional engineering teams to ensure high-quality, reliable hardware solutions.
Key Responsibilities
- Design and implement ASIC/FPGA verification environments using SystemVerilog and UVM.
- Develop reusable, self-checking testbenches from the ground up utilizing Object-Oriented Programming concepts such as inheritance and polymorphism.
- Create and maintain verification components including drivers, monitors, predictors, scoreboards, and test sequences.
- Develop functional coverage models and perform code coverage analysis to ensure verification completeness.
- Establish and execute regression testing frameworks while collecting and analyzing coverage metrics.
- Support FPGA prototyping, integration, and validation activities based on system and program requirements.
- Collaborate with design, systems, and test engineering teams to develop effective verification strategies and ensure project success.
- Participate in debugging and root-cause analysis using waveform and simulation debug tools.
- Contribute to the definition and review of ASIC/FPGA specifications to ensure they are accurate, testable, and verifiable.
- Bachelor's degree in Engineering (Electrical, Electronics, Computer, Mechanical, Aeronautical, or related disciplines), Computer Science, Mathematics, Physics, Chemistry, Data Science, or an equivalent technical field.
- Proven experience in ASIC/FPGA verification.
- Strong understanding of verification methodologies using SystemVerilog and UVM.
- Experience developing verification architectures and supporting production-quality ASIC/FPGA releases.
- Proficiency in SystemVerilog, including SystemVerilog Assertions (SVA).
- Experience creating and executing detailed verification test plans.
- Strong knowledge of Object-Oriented Programming concepts, including inheritance and polymorphism.
- Ability to develop reusable and self-checking testbench environments.
- Experience with functional coverage development and code coverage closure.
- Ability to work closely with design and systems engineering teams to define and verify hardware specifications.
- Experience using waveform debugging and simulation analysis tools.
- Knowledge of revision control systems such as Git, SVN, or CVS.
- Comfortable working in Linux-based development environments.
- 10+ years of relevant ASIC/FPGA verification experience.
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
- Experience with hardware integration and testing of ASIC/FPGA designs.
- Hands-on experience with hardware emulation platforms, particularly Cadence Palladium.
- Experience verifying high-speed interfaces such as PCIe, Ethernet, and JESD204C.
- Proficiency in scripting languages such as Python, Perl, Shell, and Make.
- Familiarity with radiation mitigation techniques and space-grade electronic design practices.
- Demonstrated track record of achieving successful first-pass ASIC silicon validation.
- Strong analytical and problem-solving abilities.
- Excellent communication and collaboration skills.
- Ability to work effectively in a fast-paced engineering environment.
- Experience supporting complex digital hardware development programs from concept through production.
By providing your phone number, you consent to: (1) receive automated text messages and calls from the Judge Group, Inc. and its affiliates (collectively "Judge") to such phone number regarding job opportunities, your job application, and for other related purposes. Message & data rates apply and message frequency may vary. Consistent with Judge's Privacy Policy, information obtained from your consent will not be shared with third parties for marketing/promotional purposes. Reply STOP to opt out of receiving telephone calls and text messages from Judge and HELP for help.
Contact:
This job and many more are available through The Judge Group. Please apply with us today!
Skills
SVN
Shell
FPGA
Git
Perl
Python
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