Quick overview
Job description
About the Role
Join an AI hardware team developing chips that use thermal noise in CMOS for probabilistic computing. In this principal-level role, you will lead analog and mixed-signal design and help shape architecture for upcoming chip programs.
What You'll Do
Lead design of analog and mixed-signal blocks, including ADCs, PLLs, bandgaps, regulators, high-speed SerDes, oscillators, and dividers.
Own significant parts of chip architecture and potentially serve as design lead for a chip program.
Perform hands-on layout and design verification, including DRC, ERC, and LVS.
Collaborate with IC, systems, physics, and algorithms teams to translate probabilistic computing concepts into silicon.
Help test and validate fabricated chips in the lab using signal generators, spectrum analyzers, and oscilloscopes.
What We're Looking For
Six or more years of analog and mixed-signal IC design experience, including work on blocks such as PLLs, ADCs, or SerDes.
CMOS circuit design expertise and experience across multiple circuit types, beyond a narrow specialization.
Multiple completed tape-outs, including experience with FinFET or 28 nm or 65 nm processes.
An MS or PhD in Electrical Engineering focused on circuits or IC design.
Proficiency with Cadence simulation, including parasitic extraction, Monte Carlo analysis, and process corners.
Hands-on layout experience and willingness to contribute to practical work beyond a core specialty in a startup environment.
Compensation & Benefits
Base salary range: $200,000 to $325,000 annually. Visa sponsorship is available.
Location
Hybrid, three days per week on-site in Boston, Massachusetts, United States.
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