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VLSI Physical Design Engineer - ASIC/SoC - RTL to GDS (10+ Yrs)

Dexian DISYSFolsom, CA🇺🇸United StatesPosted 8 Sept 2026

Why This Role Stands Out

This role offers you the chance to lead critical block-level physical design from RTL to GDSII, leveraging your extensive experience with advanced nodes and Fusion Compiler within a reputable global organization. You'll thrive in this hybrid position if you're a seasoned engineer ready to make a significant impact on complex ASIC/SoC projects. Apply now to join a dynamic team and contribute to groundbreaking technology solutions.

Quick Overview

Seniority
Mid Senior
Work mode
Hybrid
Location
Folsom, CA, United States
Posted
Yesterday

Job Description



VLSI Physical Design Engineer - ASIC/SoC - RTL to GDS
Folsom, CA
3 + Months


Role:
Lead block-level physical design from RTL to GDSII.


Must Have:
10+ years exp, advanced nodes, and Fusion Compiler.



Dexian stands at the forefront of Talent + Technology solutions with a presence spanning more than 70 locations worldwide and a team exceeding 10,000 professionals. As one of the largest technology and professional staffing companies and one of the largest minority-owned staffing companies in the United States, Dexian combines over 30 years of industry expertise with cutting-edge technologies to deliver comprehensive global services and support.

Dexian connects the right talent and the right technology with the right organizations to deliver trajectory-changing results that help everyone achieve their ambitions and goals. To learn more, please visit .

Dexian is an Equal Opportunity Employer that recruits and hires qualified candidates without regard to race, religion, sex, sexual orientation, gender identity, age, national origin, ancestry, citizenship, disability, or veteran status.




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