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Senior FPGA Engineer with Security Clearance

TEKsystems c/o Allegis GroupCedar Rapids, IA🇺🇸United States

Why this role stands out

Accelerate your career by joining a high-impact team at the forefront of defense innovation, where you will leverage your specialized FPGA expertise to develop cutting-edge mission systems. This hybrid role is perfect for a collaborative engineer who thrives on complex problem-solving and values a culture that prioritizes both professional growth and technical excellence. Apply today to secure your place in this mission-critical work and take the next step in your engineering journey.

Quick overview

SeniorityMid Senior
Employment typeTemporary/Casual
Work modeHybrid
LocationCedar Rapids, IA, United States
FPGASimulinkVHDLVerilogJiraAgile

Job description

Senior FPGA Engineer TEKsystems is seeking a highly skilled and innovative Senior FPGA Engineering Contractor to support one of our customers. Your work will contribute to the development of cutting-edge defense solutions across Mission Systems, leveraging your expertise in the design, implementation, verification, and integration of a wide variety of high-performance digital FPGAs. What You Will Do • Adhere to all applicable Collins Engineering Development and Quality processes, procedures, instructions and guidelines.

  • Participate in Agile team meetings and planning activities, as required to support programs covered by this work plan.
  • Requirements, design and verification of FPGA solutions
  • Integration of developed FPGA on target hardware units
  • Supporting peer reviews and certification analysis activities
  • Peer reviewing FPGA development artifacts
  • Management of change request and task assignments through Jira Qualifications You Must Have • Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience.
  • An active U.S. government issued Final Secret Security Clearance is required
  • A minimum of 3 years professional experience in FPGA development, ASIC front end, or related areas
  • Proficient in VHDL/Verilog for FPGA/ASIC design and implementation.
  • Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure
  • Familiarity with FPGA platforms such as AMD/Xilinx, Altera, Microchip, or others, and associated toolchains (e.g., Vivado, Quartus, Libero).
  • Strong debugging and troubleshooting skills for FPGA/ASIC systems.
  • Proficiency with revision control concepts and tools (e.g., Git, Subversion) Qualifications We Prefer • Excellent communication and teamwork skills with the ability to work in a collaborative environment.
  • Experience with high-speed digital interfaces and protocols (e.g., DDR, PCIe, Ethernet).
  • Familiarity with best-practice chip-level verification techniques and languages (e.g., constrained random, functional coverage, System Verilog)
  • Experience in Simulink and/or MATLAB for modeling and simulation of DSP systems
  • Experience with algorithm development/implementation for signal processing applications such as filtering, modulation, demodulation, and spectral analysis
  • Experience in ASIC / FPGA lab validation using advanced laboratory equipment
  • Experience with Unix, scripting, C/C++, and/or Perl

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