Why This Role Stands Out
This on-site role offers a competitive hourly rate of $60-$65 and the chance to lead critical FPGA design verification activities, from test planning to signoff. You'll thrive here if you possess 8-15 years of experience in SystemVerilog/UVM and enjoy collaborating with cross-functional teams to ensure robust hardware and software validation. Apply to contribute your expertise to impactful projects!
Quick Overview
Salary
$60 - $65/hr
Seniority
Mid Senior
Work mode
On Site
Location
El Segundo, CA, United States
Posted
3 days ago
FPGA
Job Description
- Hello,
- FPGA Design Verification Engineer
- Client-Boeing
- IP layer- VDart
- Location: El Segundo, CA, onsite five days per week
- Employment Type: W-2 Contract
- Duration: 12 months
- Compensation:$70 per hour
- Work Authorization: U.S. citizenship required
- Experience: 5+ years in FPGA Design Verification
- Clearance: DoD Secret clearance preferred
Job Description:Key Skills:
- FPGA Design Verification
- SystemVerilog and UVM testbench development
- C test development and hardware/software integration
- Test plan development, functional coverage, and coverage closure
- Universal Verification Component (UVC) development
- FPGA verification from test planning through tape-out
Preferred Skills:
- SpaceWire Protocol
- DDR4 Memory Interfaces
- SerDes Connectivity
- Configuration, Control, and Telemetry Systems
Please prioritize candidates with strong hands-on FPGA verification experience who can work independently.
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