RTL Power Design

The CPU Power Team wants a talented individual contributor engineer to own and drive several activities related to CPU architecture and system level energy modeling, competitive performance and power analysis, power optimization, simulation and rollups.
Develop novel power analysis techniques, optimization engines and other tooling solutions to improve the battery life analysis and maximize the energy efficiency of our CPU
The qualified engineer will collaborate with the SoC and CPU Power Team on power analysis and projections and requirements for our CPU. This charter includes profiling the power of typical workloads such as YouTube, Facebook, etc
Perform workload analysis for battery life and tests definition for power analysis and optimization
Perform data mining analysis at the RTL and gate-level to define relevant micro-architectural transactions for high-level power estimation.
MINIMUM QUALIFICATIONS
BS in Electrical Engineering, Computer Science, or equivalent practical experience 3 years of experience in industry (e.g. Hardware, etc.) or equivalent research Experience with low-power fundamentals (e.g., dynamic and leakage, power estimation, and optimization), data analytics and profiling
Experience in flow automation (Python, C, C++, Gemini)
Expertise in vendor tools such as PTPX, Ansys Power Artist, Synopsys Prime Power RTL PREFERRED QUALIFICATIONS
3-5 years of experience in RTL design and low-power design techniques Familiar with the concept of power management, retention, DVFS
Experience with data science
Familiar with CPU benchmarking, performance analysis and competitive study Demonstrated knowledge of CPU microarchitecture and system level