Quick Overview
Seniority
Mid Senior
Employment type
Contract
Work mode
On Site
Location
Overland Park, KS, United States
Posted
10 years ago
Hadoop
Job Description
Mindlance is a national recruiting company which partners with many of the leading employers across the country. Feel free to check us out at http://www.mindlance.com.
- RF and LTE Experience
- experience with RAN OM/PM counters and KPI formulas
- strong data analytics capabilities
- experienced with basic database queries, ideally Hadoop and Teradata
Thanks & Regards
Praveen K. Paila
470-202-1117
Similar jobs
- UM
Staff FPGA Design Engineer
Auto ApplyUrsa Major
Berthoud🇺🇸Hybrid5 days agoMATLABShellFPGA+9Engineering - UM
Staff Instrumentation & Controls Engineer
Auto ApplyUrsa Major
Berthoud🇺🇸Hybrid3 weeks agoCADSCADAEngineering - UM
Electromechanical Engineer II
Auto ApplyUrsa Major
Longmont🇺🇸Hybrid3 weeks agoAssemblyCADElectrical Design+2Engineering - UM
Senior Electrical Engineer
Auto ApplyUrsa Major
Longmont🇺🇸Hybrid4 weeks agoMATLABFPGAAssembly+5Engineering - UM
Senior Avionics Test Engineer
Auto ApplyUrsa Major
Longmont🇺🇸Hybrid2 months agoEmbedded SystemsFPGAC#+5Technology - UM
Senior Avionics Product Engineer
Auto ApplyUrsa Major
Longmont🇺🇸Hybrid2 months agoBusiness DevelopmentERPCompliance+2Technology - TA
Senior Electrical Engineer, FPGA Development
Auto ApplyTrue Anomaly
Long Beach🇺🇸Hybrid4 days agoFPGAArbitrationCompliance+5Engineering - TA
Staff Electrical Engineer, FPGA Development
Auto ApplyTrue Anomaly
Long Beach🇺🇸Hybrid4 days agoFPGAComputer VisionC+++3Engineering - SH
Electrical Engineer II - III
NewAuto ApplySyska Hennessy Group
Charlotte🇺🇸Hybrid1 hour agoAutoCADDue DiligenceProject Scheduling+2Engineering - SS
Principal EMI/EMC Engineer
NewAuto ApplyStoke Space
Kent🇺🇸Hybrid1 hour agoComplianceEngineering - SP
Sr. ASIC Design Engineer (Silicon Engineering)
NewAuto ApplySpaceX
Palo Alto🇺🇸Hybrid2 days agoPythonVerilogEngineering - SP
Sr. ASIC Design Engineer (Silicon Engineering)
Auto ApplySpaceX
Redmond🇺🇸Hybrid1 week agoCompliancePythonVerilogEngineering
