Quick Overview
Job Description
We are looking for a highly motivated DFX Engineer to develop, implement, verify, and validate advanced Design-for-Test (DFT/DFX) solutions for complex SoCs and ASICs. The candidate will work closely with Architecture, Design, Verification, Physical Design, and Post-Silicon teams to ensure robust manufacturability, testability, and silicon quality.
Key Responsibilities
Create and execute test plans for DFX features including Scan, MBIST, SSN, EDT, IJTAG, and JTAG.
Verify DFX implementations at IP, subsystem, and SoC levels.
Develop SystemVerilog/UVM based verification environments and test benches.
Debug regression failures and identify root causes related to design or verification.
Generate and validate Scan/ATPG patterns for production testing.
Collaborate with cross-functional teams including Design, Architecture, Physical Design, Validation, and ATE teams.
Automate DFX flows using scripting languages and improve overall test methodologies.
Contribute to DFX architecture planning and implementation for next-generation SoCs.
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