Quick overview
Job description
Staff RTL Engineer – Ethernet
Saratoga, CA
Full-Time
Join a cutting-edge hardware company building next-generation networking silicon to accelerate AI training and inference.
We’re seeking a Staff RTL Engineer to help architect and implement high-performance Ethernet subsystems (MAC, PCS, SerDes) for advanced Networking ICs.
Key Responsibilities
Translate architecture into microarchitecture & RTL implementation
Design and integrate Ethernet IO subsystems (MAC/PCS/PHY/SerDes)
Perform RTL coding, debug, and design reviews
Collaborate with Verification, Physical Design & Firmware teams
Support post-silicon bring-up and productization
Qualifications
MSEE with 8–15 years of ASIC/RTL design experience
Strong expertise in Ethernet 802.3 protocols (Layer 2/3/4)
Experience integrating MAC + PCS + SerDes (100G+ preferred)
Solid understanding of SerDes fundamentals (DFE, CTLE, clocking)
Multiple successful networking ASIC tape-outs
Strong knowledge of ASIC design flow, DFT & physical implementation
If you're passionate about high-speed networking and AI infrastructure silicon, apply today.
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