Quick Overview
Seniority
Mid Senior
Work mode
On Site
Location
Fremont, CA, United States
Posted
22 hours ago
C++Penetration TestingEncryptionPKIEnvoyIoTEmbedded Systems
Job Description
This role at Enphase requires working onsite 3 days a week, with plans to transition back to a full 5-day in-office schedule over time.
- IQ Gateway (Envoy) — ARM Cortex-A SoC (AM335x/AM62x) running embedded Linux, acting as the on-premise brain for every Enphase solar installation. Connects to the cloud via Wi-Fi, Ethernet, or cellular (LTE Cat-M1) and orchestrates OTA firmware delivery to the entire on-site fleet.
- IQ8 Microinverters — Custom 8051-based ASIC with PLC (powerline communication) connectivity. Deployed at massive scale (80M+ units). Communicates with the gateway over the AC power line using proprietary PLC protocols with AES/XXTEA encryption and SHA-256 session key derivation.
- IQ Battery & System Controller (Enpower) — Safety-critical Battery Management System (BMS) and automatic transfer switch controlling solar/battery/grid interactions. CAN bus + PLC interfaces. Firmware controls high-voltage DC and AC switching with direct life-safety implications.
- IQ EV Charger & Balcony Solar — Network-connected consumer products entering the EU market, subject to ETSI EN 303 645, RED Article 3.3, the RED Delegated Act, and the EU Cyber Resilience Act.
- IQ Energy Router — Intelligent energy routing with grid-interactive capabilities, controlling power flows across solar, battery, grid, and loads.
- Architect and harden secure boot chains across the product portfolio: AM335x/AM62x (Gateway), 8051 ASIC (Microinverters), and BMS controllers (Battery/Enpower) — signed bootloaders, anti-rollback counters, eFuse/OTP provisioning, and verified boot at every stage
- Design ARM TrustZone partitioning (TEE/OP-TEE) on Gateway SoCs to isolate cryptographic operations, key material, and security-critical firmware from the normal-world OS
- Audit and remediate JTAG/SWD debug interface exposure across all hardware products — verify fuse-based disable on production units, define debug authentication policy for engineering builds
- Define the hardware Root-of-Trust architecture for next-generation products: secure elements, PUF-based device identity, and hardware crypto accelerators
- Own the end-to-end key lifecycle: manufacturing provisioning (per-device identity injection), field rotation, revocation, and decommissioning — across 80M+ deployed devices
- Redesign PLC encryption key management for microinverters: migrate from hardcoded default keys to per-site or per-device key derivation; evaluate replacement of legacy ciphers (XXTEA) with AES-based encryption within ASIC silicon constraints
- Build and maintain the mutual-TLS and PKI infrastructure for device-to-cloud authentication — per-device X.509 certificates, automated enrollment, and lifecycle management at fleet scale
- Design key storage architecture leveraging hardware-backed keystores (secure elements, TrustZone secure storage, eFuse) to eliminate software-only key storage
- Architect the secure OTA pipeline for the Enphase fleet: signed and encrypted firmware images, A/B partition scheme, anti-rollback enforcement, and fail-safe recovery — covering gateway firmware, microinverter ASIC firmware, battery BMS firmware, and System Controller firmware
- Drive compiler-level hardening across the firmware build system: stack canaries, ASLR/PIE, RELRO, FORTIFY_SOURCE, and control-flow integrity — integrate into the CMake/Clang toolchain
- Establish firmware binary analysis as a release gate: static analysis, binary composition analysis (SBOM generation), and known-vulnerability scanning for all third-party components
- Own end-to-end compliance with the EU Cyber Resilience Act: map Annex I essential requirements to technical controls, produce conformity evidence, and own the technical file and CE-marking documentation for each product family
- Own compliance with the RED Delegated Act (2022/30) Article 3.3(d)(e)(f) cybersecurity requirements for radio equipment, coordinating with notified bodies and accredited test labs on conformity assessment routes
- Plan and drive product security certification programs — scoping, evidence packages, remediation of test-lab findings, and audit readiness — across CRA, RED DA, and relevant standards (ETSI EN 303 645, IEC 62443)
- Track evolving global IoT/embedded security regulation and translate new requirements into engineering roadmaps ahead of enforcement deadlines
- Define and drive the product security test strategy across hardware, firmware, and protocol layers — static and dynamic analysis, fuzzing, protocol conformance testing, and hardware-level test benches (JTAG/SWD, side-channel, fault injection)
- Build repeatable, release-gating security test suites in partnership with QA and firmware engineering; define pass/fail criteria and exit gates for each product line
- Maintain a current security test and certification calendar aligned to product release schedules, flagging regulatory or test-lab dependencies early
- Own the product vulnerability management program (PSIRT): intake, CVSS scoring, CVE assignment/tracking, remediation SLAs, and fleet-wide patch rollout across 80M+ deployed devices
- Establish and run a coordinated vulnerability disclosure process, including researcher-facing policy, triage workflows, and cross-functional remediation ownership
- Report on vulnerability posture and remediation status to engineering and business leadership; maintain audit-ready records for regulatory and customer inquiries
- Serve as the primary technical point of contact for third-party penetration testing firms: define scope, coordinate access and lab hardware, and drive findings through triage and remediation to closure
- Manage relationships with independent security researchers and bug bounty/responsible-disclosure channels, ensuring timely acknowledgment, validation, and resolution of externally reported issues
- Translate pentest and researcher findings into architecture and process improvements, feeding lessons learned back into secure design standards
- Lead product-level threat modeling (STRIDE/PASTA) for each hardware product family, defining attack surfaces, abuse cases, and mitigations — with particular focus on safety-critical products (System Controller, Battery) where cyber-physical attacks could cause electrical hazards
- Define and maintain security architecture standards and design patterns for the embedded fleet — publish internal architecture decision records (ADRs) and conduct security design reviews for all new product and feature development
- Harden the PLC (powerline communication) protocol stack: authentication, encryption, replay protection, and key exchange — working with the ASIC firmware team within the constraints of 8051-class microcontrollers
- Secure all network interfaces on the IQ Gateway: eliminate unnecessary services (SSH, MQTT) from production firmware, enforce authenticated access on all exposed APIs, and resolve the localhost authentication bypass
- Define security requirements for CAN bus communication between the System Controller and Battery BMS, and for BLE/Wi-Fi provisioning flows on consumer products
- BE/BTech/MS/MTech in Computer Science, Electrical Engineering, Computer Engineering, or a related field
- 12+ years of experience in product/embedded security, IoT security architecture, or security engineering for hardware products
- Deep expertise in ARM security architecture: TrustZone (Cortex-A TEE/OP-TEE), TrustZone-M (Cortex-M), secure boot, chain-of-trust design, and hardware Root-of-Trust implementation
- Hands-on experience with HSM/TPM/secure element integration, cryptographic key management (AES-128/256, RSA, ECC P-256/P-384), and hardware crypto accelerators
- Strong knowledge of TLS 1.2/1.3, mutual TLS, X.509 PKI, certificate lifecycle management, and secure communication protocol design for constrained devices
- Production experience with secure OTA update architectures: firmware signing, encrypted delivery, A/B partitioning, anti-rollback, and fleet-scale deployment
- Direct experience driving product-level compliance with the EU Cyber Resilience Act and/or RED Delegated Act (2022/30) — technical files, conformity assessment, and engagement with notified bodies/test labs
- Experience owning a vulnerability management/PSIRT function: CVSS scoring, CVE handling, coordinated disclosure, and remediation SLA management
- Experience managing third-party penetration testing engagements end to end, and engaging directly with external security researchers
- Proficiency in C/C++ for embedded systems — ARM Cortex-A (embedded Linux) and Cortex-M / 8051-class (bare-metal / RTOS) targets
- Experience with compiler and binary hardening: stack protectors, PIE/ASLR, RELRO, CFI, and static/dynamic analysis tooling
- Demonstrated ability to lead threat modeling exercises (STRIDE, attack trees) and translate findings into actionable architecture decisions
- Working knowledge of IoT/embedded security standards: IEC 62443, ETSI EN 303 645, EU Cyber Resilience Act (Regulation 2024/2847), NIST SP 800-183
- Strong cross-functional collaboration skills — ability to drive security outcomes across firmware, hardware, cloud, and product teams without direct authority
- Experience securing powerline communication (PLC) protocols — HomePlug, G3-PLC, or proprietary PLC stacks
- Experience with CAN bus security, automotive-grade secure boot, or BMS/battery management system security
- Experience with manufacturing security provisioning: secure key injection, device identity enrollment, and factory line security at scale
- Knowledge of side-channel analysis, fault injection, and hardware tamper resistance countermeasures
- Experience with SBOM generation tooling (CycloneDX, SPDX) and software composition analysis for firmware
- Familiarity with energy-sector regulations: NEK/IEC standards for energy equipment
- Prior experience with security architecture for solar inverters, battery energy storage systems, or grid-edge devices
- Prior people-management or team-lead experience, or demonstrated readiness to build and lead a small product security team
- Relevant certifications: CISSP-ISSAP, GICSP (ICS security), OSCP, CCSP, or equivalent
- Ownership of product security — architecture, testing, certification, and vulnerability management — for one of the world's largest deployed IoT energy fleets (80M+ devices)
- Direct impact on global energy infrastructure security — your work protects millions of homes
- Competitive compensation package with equity participation
- Opportunity to shape Enphase's regulatory compliance posture for the EU CRA, RED Delegated Act, and emerging global IoT security regulations
- Direct engagement with external researchers and pen test partners, with real influence over remediation priorities
- Collaborative engineering culture with deep technical expertise in power electronics, embedded systems, and cloud platforms
- Career growth in a high-visibility role reporting to the Head of Product Security, with potential to grow into a team-lead capacity
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