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Design Verification Engineer

SivaltechSan Diego, CA🇺🇸United StatesPosted 3 Aug 2026

Quick Overview

Work Type
On Site
Level
Mid Senior

Job Description

Design Verification Engineer

Location: Bay Area, CA (Onsite/Hybrid)
Experience: 8+ Years

Job Summary

We are seeking an experienced Design Verification Engineer with strong expertise in ASIC/SoC verification to join our semiconductor team. The ideal candidate will have extensive experience in SystemVerilog, UVM, and protocol verification, with a proven track record of developing robust verification environments and achieving coverage closure.

Key Responsibilities

  • Develop and execute comprehensive verification plans for ASIC/SoC designs.

  • Build reusable UVM-based verification environments, testbenches, scoreboards, checkers, and assertions.

  • Create and execute directed and constrained-random test cases.

  • Perform functional, code, assertion, and toggle coverage analysis and drive coverage closure.

  • Debug RTL and simulation issues in collaboration with design teams.

  • Verify complex IPs and SoCs at block, subsystem, and chip level.

  • Work closely with RTL designers, architects, and physical design teams throughout the development lifecycle.

  • Participate in regression execution, bug tracking, and verification sign-off.

Required Skills

  • 8+ years of ASIC/SoC Design Verification experience.

  • Strong expertise in SystemVerilog and UVM.

  • Excellent knowledge of Verilog and digital design fundamentals.

  • Experience with industry-standard simulators such as Synopsys VCS, Cadence Xcelium, or Siemens QuestaSim.

  • Strong debugging and scripting skills using Python, Perl, Shell, or Tcl.

  • Experience with assertions (SVA), constrained-random verification, and functional coverage.

  • Familiarity with version control systems such as Git.

Preferred Experience

  • Chip-level and SoC verification.

  • Verification of high-speed bus protocols such as AXI, AHB, APB, PCIe, USB, Ethernet, DDR, MIPI, or UCIe.

  • Low-power verification using UPF/CPF.

  • Experience with emulation or FPGA prototyping is a plus.

Education

Bachelor''s or Master''s degree in Electronics Engineering, Computer Engineering, or a related field.

Employment Type: Full-Time

If you are passionate about ASIC verification and have hands-on experience with modern verification methodologies, we''d love to hear from you.

Skills

FPGA
Verilog

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