Why This Role Stands Out
This role offers an excellent opportunity to contribute to cutting-edge semiconductor designs, developing advanced verification environments with SystemVerilog and UVM. You'll thrive here if you possess 8+ years of ASIC/SoC verification experience and a passion for driving complex projects to successful completion. Apply now to join a dynamic team and advance your career in the heart of the Bay Area.
Quick Overview
Job Description
Design Verification Engineer
Location: Bay Area, CA (Onsite/Hybrid)
Experience: 8+ Years
Job Summary
We are seeking an experienced Design Verification Engineer with strong expertise in ASIC/SoC verification to join our semiconductor team. The ideal candidate will have extensive experience in SystemVerilog, UVM, and protocol verification, with a proven track record of developing robust verification environments and achieving coverage closure.
Key Responsibilities
Develop and execute comprehensive verification plans for ASIC/SoC designs.
Build reusable UVM-based verification environments, testbenches, scoreboards, checkers, and assertions.
Create and execute directed and constrained-random test cases.
Perform functional, code, assertion, and toggle coverage analysis and drive coverage closure.
Debug RTL and simulation issues in collaboration with design teams.
Verify complex IPs and SoCs at block, subsystem, and chip level.
Work closely with RTL designers, architects, and physical design teams throughout the development lifecycle.
Participate in regression execution, bug tracking, and verification sign-off.
Required Skills
8+ years of ASIC/SoC Design Verification experience.
Strong expertise in SystemVerilog and UVM.
Excellent knowledge of Verilog and digital design fundamentals.
Experience with industry-standard simulators such as Synopsys VCS, Cadence Xcelium, or Siemens QuestaSim.
Strong debugging and scripting skills using Python, Perl, Shell, or Tcl.
Experience with assertions (SVA), constrained-random verification, and functional coverage.
Familiarity with version control systems such as Git.
Preferred Experience
Chip-level and SoC verification.
Verification of high-speed bus protocols such as AXI, AHB, APB, PCIe, USB, Ethernet, DDR, MIPI, or UCIe.
Low-power verification using UPF/CPF.
Experience with emulation or FPGA prototyping is a plus.
Education
Bachelor''s or Master''s degree in Electronics Engineering, Computer Engineering, or a related field.
Employment Type: Full-Time
If you are passionate about ASIC verification and have hands-on experience with modern verification methodologies, we''d love to hear from you.
Similar jobs
- CH
Electrical Engineer (vehicle electrical system)
NewCube Hub, Inc.
Horicon, WI🇺🇸On-siteYesterdayCADAutomotive - HS
Electrical Engineer
NewHierarch Soft Technologies, Inc.
Tempe, AZ🇺🇸On-siteYesterdayEngineering - BO
Lead, Senior or Experienced Electronic Systems Design, Integration, Analysis, and Test Engineers Sign on Bonus Potential
NewBoeing
Saint Louis, Missouri🇺🇸$112.2k - $151.8k/yrOn-site55 minutes agoTechnology - FT
Lead Senior Electrical Engineer (H/F)
NewFaith Technologies
Black Creek, WI🇺🇸On-siteYesterdayCADCATIASolidWorksEngineering - FT
Electrical Engineering Team Lead
NewFaith Technologies
Kaukauna, WI🇺🇸On-siteYesterdayCADCATIASolidWorksEngineering - FT
Senior Electrical Engineer (8+ Years Experience)
NewFaith Technologies
Reedsville, WI🇺🇸On-siteYesterdayCADCATIASolidWorksEngineering