Senior Test Development Engineer job opportunity at Tewksbury, M with Security Clearance
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Job Description
Indotronix is seeking an STS Senior Test Development Engineer (P3) professional for an exciting job opportunity in Tewksbury, MA.
Job Title: MAT Ramp: STS Senior Test Development Engineer (P3) Location: Tewksbury, MA 98370 Duration: 12 Months Contract Pay Rate: $100/hr on W2 Note: Interim clearance or secret clearance to start Job Description: As a member of the Sensor Test Solutions department, the candidate would be part of a team which is responsible for the design, integration and deployment of test equipment. We deploy our test equipment to our factory in Andover, MA, as well as depot facilities located both domestically and internationally.
Our project teams are made up of engineers with a broad range of electrical engineering expertise and experience in fields such as RF, Power, Digital, and Analog. In addition to these different fields, all our engineers are responsible for the development of both hardware and software.
Key deliverables for this role Test station and fixture designs (Electrical schematic capture and PCB design) What does success look like for this role: The individual comes up to speed quickly, has an impact on our projects developing test stations/fixtures/automated test software, has familiarity with a process heavy work environment. Our projects are nearly always team based (5 10 engineers) so attributes such as strong collaboration and communication, in addition to technical aptitude, are essential for achieving success within our department.
Required and Desired Qualifications Core Technical Skills (Non negotiables) Electrical Test Instrument/Equipment experience Power, RF, Digital Logic, Analog circuit knowledge Automated Test Software development experience
Desired Skills (Nice to Have): Experience with project leadership, project cost and schedule management, i.e. EVMS, MS ProjectDoW (DoD) project development life cycle processes Tools / Technologies Required Automated test software (C/C++/C#, LabView, TestStand)ORCAD and/or Cadence Allegro for PCB design, experience in any of the following: Power, RF, Digital Logic Years of Experience Required: Minimum of 5 years experience Education Required: STEM bachelor's degree
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