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CPU Design & Verification Engineer

Stellar IT SolutionsAustin, TX🇺🇸United StatesPosted Oct 5, 2026

Quick Overview

Seniority
Mid Senior
Work mode
Hybrid
Location
Austin, TX, United States
Posted
Yesterday
RISC-VVerilog

Job Description

Job Title: CPU Design & Verification Engineer
Interview: Virtual
Job Duration: Long Term Contract
Job Location: Austin, TX OR Bay Area, CA
Job Overview

We are seeking experienced CPU Design & Verification Engineers to contribute to the development of next-generation processor technologies. The ideal candidate will have strong expertise in RTL design and verification, a solid understanding of CPU microarchitecture, and hands-on experience debugging complex processor blocks.

Responsibilities

  • Work on the design and/or verification of CPU microarchitecture and RTL blocks.
  • Develop, enhance, and maintain RTL code using Verilog/SystemVerilog.
  • Develop comprehensive verification plans, testbenches, assertions, and functional coverage.
  • Execute verification activities at both the block and SoC levels.
  • Analyze and resolve RTL, simulation, and functional issues through effective debugging.
  • Work closely with architecture, design, verification, physical design, and firmware teams throughout the development lifecycle.
  • Contribute to design and verification sign-off activities and ensure readiness for production milestones.

Required Qualifications & Technical Skills

  • 5+ years of relevant experience in CPU/processor design or verification.
  • Strong hands-on proficiency in Verilog/SystemVerilog.
  • Experience working with UVM and constrained-random verification methodologies.
  • Strong understanding of CPU architecture, processor pipelines, caches, and memory hierarchy.
  • Hands-on experience with industry-standard tools such as VCS, Verdi, Questa, or equivalent.

Preferred Qualifications

  • Experience working with ARM, RISC-V, x86, or other CPU architectures.
  • Knowledge or hands-on experience in formal verification.
  • Experience working with advanced semiconductor process nodes.

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