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Full time
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Radio Systems Research Engineer

NokiaMurray Hill🇺🇸United StatesPosted Oct 6, 2026

Quick Overview

Seniority
Mid Senior
Employment type
Full Time
Work mode
On Site
Location
Murray Hill, United States
Posted
Yesterday
5GCUDAIntellectual PropertyScheduling

Job Description

Team Description
The goal of the Radio Systems USA Department at Nokia Bell Labs is to develop novel, superior, and disruptive
technologies for wireless communication and sensing systems. We are devoted to establishing fundamentals as well as to developing game-changing, high-impact technologies and concepts for radio connectivity in AI-native networks over an ever-widening range of frequency bands.
 

We are seeking a talented and self-motivated research engineer to work with a team of domain experts with a focus on system design, implementation and validation of various new concepts and algorithms in radio systems. You are expected to

  • Take initiative, and work independently as well as within a team
  • Work closely with domain experts to implement and validate new concepts and algorithms
  • Generate intellectual property and technology transfer to business groups and standards bodies
  • Document and communicate design and experiment results clearly and effectively
     
  • Master's degree in electrical engineering or related field
  • Knowledge of wireless physical-layer preferably including massive MIMO, beamforming or precoding, channel estimation, scheduling, link adaptation, or other techniques that improve spectral efficiency.
  • Experience working with real-time systems across latency and resource efficiency using reproducible methods and representative workloads.
  • Ability to translate research into robust prototypes and clearly communicate architecture choices, bottlenecks, trade-offs, and customer-relevant conclusions to research, product, and customer-facing teams.
  • Demonstrated GPU/CPU performance engineering or ability to learn fast, including CUDA or equivalent accelerator programming, kernel optimization, memory-management optimization, profiling, and latency analysis. CPU programming including multithreading, vectorization, cache-aware implementation, and use of optimized numerical libraries, to establish fair and credible baselines.

Preferred: familiarity with AI-RAN, 5G-Advanced or 6G RAN architectures, GPU-accelerated Layer 1/Layer 2 processing, machine-learning inference optimization, and relevant development frameworks or SDKs.
 

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