Quick overview
SeniorityMid Senior
Work modeHybrid
LocationChicago, IL, United States
Job description
- Digital and embedded hardware design: 5–7 years of hands-on experience taking designs from concept, schematic through bring-up testing.
- PCIe interface design: Experience designing and debugging PCIe Gen1, including reference clock distribution, AC coupling, lane routing constraints, link training issues, and eye/compliance debug.
- Low-voltage DC power design: Power tree and sequencing design with buck converters and LDOs, power-integrity checks, and low-power techniques (power budgeting, sleep modes, leakage reduction).
- Signal integrity: Practical knowledge of high-speed interface design, including impedance-controlled stackups, termination, crosstalk, return-path management, and pre-/post-layout SI review.
- Precision analog and low-noise mixed-signal design: ADC/DAC and sensor front ends, reference and op-amp design, analog/digital grounding and partitioning, and noise budgeting.
- EDA tools: Proficiency in Cadence Allegro Design Entry HDL (Concept HDL) for schematic capture, including library/symbol management and clean BOM and netlist handoff to layout.
- Peripheral and serial interfaces: SPI, I²C, UART, USB, and GPIO, including level shifting, pull-up sizing, bus timing, and protocol-level debugging.
- Execute design validation, board bring-up, functional testing, and performance verification.
- Perform root cause analysis (RCA) and debug hardware issues during development, validation, and production phases.
- Bring-up and validation: Board bring-up, hardware debugging, and design validation using oscilloscopes, logic analyzers, and protocol analyzers, with documented test results.
- Cross-functional collaboration: Works closely with PCB layout, firmware, and system engineering teams, including design reviews, DFM/DFT feedback, and component selection with lifecycle/obsolescence checks.
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