Why This Role Stands Out
This hybrid role offers a fantastic opportunity to deepen your expertise in cutting-edge DFX and debug verification within a reputable company, with potential for contract extension. You'll thrive here if you possess strong RTL verification skills and a passion for tackling complex validation challenges. Apply now to contribute to impactful projects and advance your career in a flexible work environment.
Quick Overview
Job Description
Looking for a senior DFT Engineer with 8–12 years of relevant experience in Scan Insertion and ATPG Validation, with hands-on experience using Mentor Tessent and Synopsys DFT Compiler.
DFT Scan Insertion / ATPG Validation Engineer
Location: Santa Clara, CA
Duration: 12 Months
Experience: 8–12 years
Required Skills:
- Strong experience in DFT Scan Insertion
- Hands-on experience with ATPG Validation
- Strong understanding of DFT methodologies, scan architecture, and ATPG flows
Required Tools:
- Mentor Tessent (Siemens)
- Synopsys DFT Compiler
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