Quick overview
Job description
Key Responsibilities
Lead the definition of system-level solutions with emphasis on compute memory bottlenecks, bandwidth and latency management
Analyze workload requirements and map them to hardware technologies and architecture while optimizing performance, power efficiency, and scalability
Develop system-level architecture that is co-optimized with software
Develop system-level performance and power models with the ability to assist in making customer-specific trade-offs
Map AI/ML models to hardware requirements
Collaborate with software and hardware teams to ensure seamless integration of memory subsystems, cache hierarchies, and system interconnects
Explore novel technologies and architectures such as in-memory and near-memory computing, and innovative packaging solutions
Guide design teams, produce technical documentation, and IP designs
Clearly articulate and drive key concepts to a broad technical audience
Required Qualifications
10+ years of experience
Master's Degree in Electrical Engineering
Master's Degree in Computer Engineering
Master's Degree in Computer Science
Ph.
D. in Electrical Engineering
Ph. D. in Computer Engineering
Ph. D. in Computer Science
Skills
System Architecture
SoC Design
Memory System Development
Memory Technologies (DRAM, DDR, LPDDR, GDDR, NAND)
AI Accelerators and GPU Architecture
C/C++ Programming
Python
RTL Design
System-Level Modeling
Interconnect Technologies (PCIe, CXL, NoCs, Ethernet, RDMA)
Chiplet Design
In-Memory and Near-Memory Computing
Technical Leadership
Technical Documentation
Mentoring and Coaching
Stakeholder Communication
Workload Analysis
Schedule
Start date: 2027-01-04
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