Role: SoC Design Engineer

Location: Remote – US
Duration: 12 Months

Role Overview:

We are looking for an experienced SoC Design Engineer to drive the architecture, integration, and implementation of complex SoC blocks and subsystems. The role involves working across the chip design lifecycle, from subsystem specification and IP integration to synthesis, physical design support, power optimization, and PCB team collaboration.

Key Responsibilities:

• Define and maintain architectural specifications for SoC subsystems and support top-level SoC integration.

• Integrate complex IPs, including processors, PCIe, DDR, and other subsystem components, in collaboration with IP vendors.

• Develop and propagate timing constraints (SDC) and power intent specifications (UPF) from block to SoC level.

• Establish and maintain design quality flows for CDC, RDC, RTL linting, power analysis, and synthesis.

• Analyze power, performance, and area (PPA) reports and recommend design optimizations.

• Support synthesis, DFT, and place-and-route teams in debugging timing, power, and implementation issues.

• Develop automation scripts using Tcl and Python to improve design and analysis workflows.

• Support PCB design teams with chip-level integration requirements and interface-related issues.

Minimum Qualifications:

• Master’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.

• 4+ years of experience in SoC integration and subsystem design.

• Proficiency in Verilog, SystemVerilog, or VHDL and familiarity with RTL design methodologies.

• Experience with CDC/RDC analysis, linting, synthesis, power analysis, and timing constraints.

• At least 2 years of programming or scripting experience using Tcl, Python, or similar languages.

• Strong analytical, problem-solving, documentation, and English communication skills.

Preferred Qualifications:

• Experience integrating ARM application-class or real-time processors, GPUs, MMUs, and cache-coherent systems.

• Knowledge of RTL-to-GDS implementation flows and basic verification methodologies, including UVM.

• Hands-on experience with Synopsys tools such as VCS, Verdi, SpyGlass, Design Compiler, and RTL Architect.

• Basic to intermediate C programming skills for embedded systems.

• Ability to collaborate effectively with architecture, verification, physical design, IP vendor, and PCB engineering teams.