Quick Overview
Seniority
Mid Senior
Work mode
On Site
Location
Azusa, CA, United States
Posted
18 hours ago
Embedded SystemsFPGAAgileC++
Job Description
Tittle : Lead Flight Software Engineer - Algorithms, Embedded C/C++,
Work Location: Onsite in Azusa, CA
Duration: 2 months
Terms: W2 Contract
Work Authorization:
Key Skills: Algorithms, Embedded C/C++, RTOS, Flight Software, FPGA/CPU/GPU, Hardware/Software Integration
Position Summary:
- As an Algorithm Software Engineer Lead, you will support our Flight Software Department.
- As a member of the Flight Software Department, you’ll get to implement flight software solutions.
Required Qualifications:
- Bachelor's degree in a STEM discipline with 12 years of relevant experience;
- OR a Master's degree in a STEM discipline with 10 years of relevant experience;
- OR a PhD in a STEM discipline with 8 years of relevant experience.
- Ability to translate MARs into flight software code.
- Strong math proficiency for algorithm development and implementation.
- Proficiency in software development and execution for embedded/flight systems.
- Understanding of kernel-level concepts (OS, kernel, low-level software).
- Experience working in flight environments (real-time operating systems, flight software constraints).
- Experience integrating software into third-party platforms.
- Strong background in embedded systems development.
- Experience with flight hardware and hardware–software integration.
- Hands-on experience implementing algorithms in embedded/flight code.
- Familiarity with Agile project management practices.
Preferred Qualifications:
- Active DoD Secret clearance is preferred, not mandatory.
- Experience optimizing intra-SoC distributed processing across integrated FPGA, CPU, and GPU components.
- Expertise with NVIDIA Orin Jetson platforms for high-performance, real-time processing.
- Experience with Polarfire FPGAs and their integration into embedded systems.
- Proven ability to design and implement high-bandwidth (≈20 Gbps) real-time processing solutions.
- Demonstrated skill in minimizing processing latency in heterogeneous compute architectures.
- Strong background in mapping and fitting complex algorithms to fixed hardware configurations.
- Knowledge of hardware–software co-design principles for embedded/compute-intensive systems.
Email your resume to to apply!
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