Hiring: Staff / Sr Staff SoC Clock Design Engineer Saratoga, CA | Full-Time | 7nm & Below

Join an innovative hardware company building next-generation silicon to accelerate AI training & inference for large-scale models.

We’re seeking a seasoned Clock Design Lead to define and implement high-speed clock distribution networks for complex, multi-core SoCs at advanced nodes.

Lead SoC clock architecture & timing budgets
Design high-performance, low-skew clock distribution networks
Own CDC strategy, de-skew mechanisms & cross-domain synchronization
Drive clock modeling, STA, SDC/CDC constraints & timing closure
Collaborate with PD on CTS, floorplanning & integration
Multiple 7nm+ tape-outs required
15+ years industry experience

Experience with InnovGenus or Synopsys Fusion Compiler preferred. EMIB exposure is a plus.