Quick overview
Job description
About the Role
Join a semiconductor team developing thermodynamic computing chips. In this senior role, you will design analog and mixed-signal circuits that support a new computing architecture, working across circuit, systems, physics, and algorithms teams from concept through silicon validation.
What You'll Do
Design analog and mixed-signal building blocks, including ADCs, PLLs, bandgap references, regulators, oscillators, high-speed dividers, and SerDes.
Own circuit blocks across multiple chips, from architecture and schematic design through layout and tape-out verification.
Perform hands-on layout and Cadence simulations, including parasitic extraction, Monte Carlo, and corner analysis.
Support lab testing and validation using signal generators, spectrum analyzers, and oscilloscopes.
Collaborate with IC, systems, physics, and algorithms teams to bring circuit concepts to silicon.
What We're Looking For
Three to six years of analog and mixed-signal IC design experience using CMOS technology.
An MS or PhD in Electrical Engineering, focused on analog or mixed-signal design.
Experience designing circuits such as ADCs, PLLs, oscillators, regulators, or high-speed SerDes, with experience across multiple circuit types.
Multiple tape-outs, ideally using FinFET, 28 nm, or 65 nm processes.
Hands-on experience with Cadence Virtuoso, layout, PEX, Monte Carlo and corner analysis, and small-signal and feedback analysis.
Mixed-signal design experience, practical lab validation skills, and willingness to contribute across a broad range of circuit work.
Python or C experience is useful.
Compensation & Benefits
Base salary is $160,000 to $300,000 annually. Visa sponsorship is available.
Location
Hybrid in Boston, Massachusetts, with three days per week on-site.
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