Systems Test Integration Engineer - FPGA / Spacecraft Hardware with Security Clearance

Systems Test Integration Engineer FPGA | Spacecraft Hardware Scottsdale, AZ Pay Estimated: $74.63 - $79.63/Hour U.S. Citizenship is required by Federal Law We are hiring a Systems Test Integration Engineer - FPGA / Spacecraft Hardware to support National Security spacecraft programs through the integration and testing of high-reliability space payloads, payload emulation systems, and Hardware DevOps Environment (HDE) infrastructure.

This role supports spacecraft Integration & Test (I&T), automated test environments, Special Test Equipment (STE), FPGA development, and payload emulation while working across DevOps, electrical engineering, hardware, software, program management, and other engineering disciplines. The engineer will design, deploy, integrate, and troubleshoot payload emulation and test capabilities used to verify space flight hardware.

Key technologies include Xilinx UltraScale/UltraScale+ FPGAs, VHDL, SystemVerilog, Vivado, JESD204B, 10GbE, SerDes, SPI, JTAG, FMC/VITA 57, Linux, Windows , and electronic test equipment.

Responsibilities

• Design, deploy, and integrate spacecraft payload emulation capabilities in coordination with DevOps and Special Test Equipment teams.
• Perform integration and test of high-reliability space flight hardware and spacecraft payload systems.
• Collaborate across engineering disciplines to define unit functionality, document interface requirements, and verify system and hardware behavior.
• Lead FPGA implementation, hardware integration, debugging, and troubleshooting activities to meet program milestones.
• Develop and integrate FPGA-based capabilities supporting high-speed digital and serial interfaces.
• Operate electronic test equipment, including power supplies, digital multimeters, signal generators, signal and logic analyzers, and oscilloscopes.
• Support automated testing environments and Special Test Equipment used for spacecraft integration and verification.
• Support engineering lifecycle activities and technical reviews, including SRR, PDR, CDR, TRR, and PSA evolution.
• Support failure investigation and corrective-action activities involving space electronic systems, including Failure Review Board and Failure Reporting and Corrective Action processes.
• Work within Linux (RHEL/Ubuntu) and Windows 11 operating environments and use Microsoft productivity tools.
• Coordinate technical priorities, schedules, integration activities, and status across cross-functional engineering teams.
• Evaluate emerging technologies and coordinate with vendors to maintain current hardware and test capabilities.
• Identify appropriate opportunities to apply AI-enabled tools to engineering processes, continuous improvement, and technical innovation.

Qualifications

• U.S. Citizenship is required by Federal Law
• Security Clearance: Department of Defense TS/SCI security clearance is preferred at time of hire.
• Bachelor's degree in Electrical Engineering or a related Science, Engineering, Technology, or Mathematics field.
• Minimum 5 years of job-related experience , or a Master's degree plus a minimum of 3 years of job-related experience .

Preferred Qualifications

• Direct Integration & Test experience with high-reliability spacecraft payloads and/or space vehicles.
• Experience with automated testing environments or Special Test Equipment (STE) .
• Experience with Failure Review Board processes and Failure Reporting and Corrective Action systems supporting electronic systems for space applications.
• Experience supporting System Requirements Review (SRR), Preliminary Design Review (PDR), Critical Design Review (CDR), Test Readiness Review (TRR), and PSA evolution.
• 5+ years of FPGA development experience using Xilinx UltraScale/UltraScale+ devices.
• Proficiency with VHDL and/or SystemVerilog for RTL design, from microarchitecture definition through hardware integration.
• Experience developing FPGA firmware for high-speed serial interfaces, including JESD204B (6+ Gbps), 10GbE, and SerDes .
• Proficiency with the Xilinx Vivado toolchain, including synthesis, implementation, timing closure, and Integrated Logic Analyzer (ILA) debugging.
• Experience with SPI command/control interfaces, JTAG, and general-purpose digital I/O .
• Familiarity with FMC mezzanine card interfaces (VITA 57) .
• Experience leading spacecraft integration and test lifecycle activities and resolving complex hardware integration issues.
• Demonstrated ability to provide technical leadership across multidisciplinary engineering teams and interface with program management and customers.
• Experience evaluating new technologies and working with technical vendors to support evolving program requirements.
• Ability to identify appropriate applications of AI-enabled tools for engineering productivity, continuous improvement, and innovation. Moseley Technical Services, Inc. is an AA/EEO/Veterans/Disabled Employer.