Quick Overview
Seniority
Mid Senior
Work mode
On Site
Location
San Jose, CA, United States
Posted
19 hours ago
FPGAVerilog
Job Description
Position: Senior Emulation Engineer
Location: San Jose, CA – Onsite
Experience: 10+ Years
Key Responsibilities:
Location: San Jose, CA – Onsite
Experience: 10+ Years
Key Responsibilities:
- Set up and maintain Siemens Veloce emulation and FPGA prototyping platforms.
- Adapt SoC designs for emulation and prototyping.
- Develop and debug emulation testbenches and system-level environments.
- Support pre-silicon validation, power/performance analysis, and early software bring-up.
- Participate in silicon bring-up and post-silicon validation.
- Collaborate with Design and Verification teams to identify and debug issues.
- Optimize emulation workloads and improve turnaround time.
- Work with firmware/software teams for OS and driver testing on emulators.
- Develop automation scripts and infrastructure using Python, Tcl, or Perl.
- 7+ years of SoC design/emulation experience.
- Hands-on experience with Veloce, Palladium, or ZeBu.
- Experience with FPGA prototyping platforms such as HAPS, Protium, or proFPGA.
- Strong knowledge of PCIe, UCIe, LPDDR, and HBM.
- Strong understanding of RTL, Verilog/SystemVerilog, digital design, and SoC architecture.
- Experience with hardware debug tools, waveform viewers, and logic analyzers.
- Scripting experience with Python, Tcl, or Perl.
- Familiarity with UVM, simulation, and testbench environments.
- SystemVerilog/UVM-based verification experience.
- Hands-on C/C++ software development experience.
- Experience with OS and driver testing in emulation environments.
- BS/MS/PhD in Electrical Engineering, Computer Science, or a related field.
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