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Design Verification Engineer

NMK Global Inc.San Jose, CA🇺🇸United StatesPosted Oct 15, 2026

Quick Overview

Seniority
Mid Senior
Work mode
On Site
Location
San Jose, CA, United States
Posted
20 hours ago
Verilog

Job Description

NMK Global Inc. is a global IT Services & Solutions company specializing in IT Staffing, Technology Consulting, Workforce Solutions, and Application Development Services. We help organizations build high-performing technology teams by connecting them with exceptional talent across a wide range of industries. Our expertise, industry knowledge, and consultative approach enable clients to achieve successful business outcomes while helping professionals advance their careers.
Job Title: Design Verification Engineer
Location: San Jose, CA – Onsite

Job Summary:

We are seeking a Design Verification Engineer to join our Interface IP DV team. You will work with architects, designers, and vendors to ensure that all our architecture requirements are met in the IP subsystems and interfaces being created, validate correctness and performance across the full hardware-software stack. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges.

Key responsibilities:

  • End to end ownership of one or more of the following IP subsystems: PCIe, Ethernet, CPU (arc/arm), low power peripherals, sensors
  • Understand vendor IP configurations and handle handshakes with internal IP team
  • Develop and maintain UVM/SystemVerilog-based verification environments to ensure functional correctness, performance, and compliance with IP specifications.
  • Collaborate with integration and SoC DV teams to validate seamless interaction of external IPs within the broader chip architecture.
  • Drive coverage closure and sign-off by defining metrics, analyzing gaps, and ensuring comprehensive verification across corner cases and stress scenarios.

You may be a good fit if you have

  • 8+ years of design verification experience
  • You enjoy digging deep into complex verification challenges and finding creative ways to expose corner-case bugs.
  • You have hands-on experience with industry-standard verification methodologies like SystemVerilog/UVM and understand how to build scalable, reusable test benches.
  • You are comfortable working with standard IP interfaces and protocols such as PCIe, Ethernet, AXI/AMBA, or ARM/ARC CPUs.
  • You thrive in a fast-paced startup environment and can take ownership of projects with minimal direction.
  • You collaborate naturally with cross-functional teams - from RTL design to software and emulation - and can clearly communicate technical insights.

Strong candidates may also have experience with

  • Experience handling vendors and integration of IP/VIP’s
  • UVM/System Verilog

NMK Global Inc. is an Equal Opportunity Employer. We are committed to creating an inclusive workplace and consider all qualified applicants without regard to age, race, color, religion, sex, national origin, disability, protected veteran status, sexual orientation, gender identity, or any other characteristic protected by applicable law.

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