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DFT Engineers

Vertex EliteSanta Clara, CA🇺🇸United StatesPosted 23 Jul 2026

Why This Role Stands Out

Grow your expertise in cutting-edge DFT and ATPG for SoC/ASIC designs at Vertex Elite, a company renowned for innovation and excellence. You'll thrive in this hybrid role if you possess strong analytical skills and a passion for semiconductor advancement, contributing to high-performance projects while enjoying work-life flexibility. Embrace this opportunity to significantly advance your career in a dynamic and supportive environment.

Quick Overview

Work Type
Hybrid
Level
Mid Senior

Job Description

Required Skills & Qualifications
• 5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs
• Strong understanding of DFT fundamentals including controllability, observability, and scan-based testing
• Proven expertise in ATPG pattern generation, analysis, and debug
• Experience with MBIST, including memory test architectures and diagnostics
• Knowledge of IO Test methodologies for interface and pin level validation
• Solid understanding of clock DFT and clock verification concepts
• Strong grasp of digital design and RTL fundamentals
• Experience with industry standard DFT/ATPG EDA tools
• Ability to work effectively in fast paced, high performance semiconductor programs
• Strong analytical, problem solving, and communication skills

 

Vertex is an equal opportunity employer and does not discriminate on the basis of race, colour, gender, religion, age, sexual orientation, national origin or citizenship status or ethnic origin, disability, marital status, veteran status, or any other occupationally irrelevant criteria.

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