Analog Layout Engineer

 

We are looking for an experienced Analog Layout Engineer with 8+ years of industry experience in advanced semiconductor process technologies. The ideal candidate will have strong expertise in high-speed analog/mixed-signal layout and hands-on experience with advanced 2nm, 3nm, and 5nm process nodes.

The role involves ownership of complex analog and mixed-signal layout blocks, working closely with circuit designers and physical design teams to deliver high-quality, performance-optimized layouts.

 

 

* Develop high-quality analog and mixed-signal layouts for advanced technology nodes including 2nm, 3nm, and 5nm.
* Own layout implementation from floorplanning through tape-out, including verification and optimization.
* Work on critical blocks such as LDO, ADC, and SERDES.
* Perform high-speed layout with strong focus on signal integrity, matching, parasitic reduction, shielding, and noise isolation.
* Implement layout techniques such as common-centroid, interdigitation, symmetry, dummy structures, guard rings, and sensitive-node shielding.
* Collaborate closely with Analog/RF/AMS Design Engineers to understand circuit requirements and optimize layout for performance.
* Analyze and minimize the impact of parasitics, coupling, IR drop, electromigration, and process variation.
* Execute and resolve DRC, LVS, ERC, antenna, and PEX-related issues.
* Review extracted layouts and work with designers to address post-layout performance issues.
* Participate in layout reviews and contribute to methodology and design-quality improvements.
* Support block-level and top-level integration and ensure adherence to foundry and company layout guidelines.

 

* 8+ years of experience in analog/mixed-signal IC layout.
* Strong hands-on experience with 2nm, 3nm, and/or 5nm advanced process technologies.
* Proven experience in high-speed analog/mixed-signal layout.
* Strong experience with LDO, ADC, and SERDES blocks.
* Excellent knowledge of analog layout fundamentals, matching techniques, parasitic awareness, and noise isolation.
* Strong experience with Cadence Virtuoso and Virtuoso XL.
* Good understanding of DRC, LVS, ERC, PEX, and physical verification.
* Ability to interpret schematics and work independently with circuit designers.
* Strong debugging and problem-solving skills.