ASIC Design Engineer

JOB DUTIES:

• The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and internal IP's.
• Successful candidates will be responsible for leading, and participating in, the design of leading edge SoC's in advanced digital CMOS processes.
• Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams.

EXPERIENCE AND EDUCATION:

• SoC Architecture; knowledge and hand-on experience from industry ASIC design flow including RTL coding, debugging/verification, and supporting synthesis and timing closure.
• Working knowledge of ARM cores and other I/O standard interfaces.