SoC Design Verification Engineer

Position Title: SoC Design Verification Engineer

Location: San Jose, CA

Remote/Onsite: Onsite

Types of Hire: Fulltime

 

Job Description: -

We are looking for a highly skilled SoC/Performance DV engineer to drive system-level validation and performance characterization of complex SoCs. The role involves working closely with architecture, design, and software teams to ensure silicon meets performance, power, and functionality targets.

 

Key Responsibilities:

 

• Develop and execute SoC-level validation and performance verification strategy
• Build system-level testbenches, workloads, and performance models
• Analyze performance bottlenecks across CPU, memory, interconnect, and accelerators
• Perform power and performance trade-off analysis
• Collaborate with architecture, RTL, and software teams
• Debug issues at system level (HW + FW/SW interaction)

 

Required Skills:

              Strong experience in SoC-level DV / Performance validation

• Understanding of CPU architecture, memory hierarchy, NoC/interconnect
• Expertise in SystemVerilog/UVM + C/C++/Python
• Experience with performance profiling tools
• Strong debugging and analytical skills

 Good to Have:

 

Experience in post-silicon validation / bring-up

Knowledge of AI/ML or high-performance computing workloads

 

Disclaimer: E-Solutions Inc. provides equal employment opportunities (EEO) to all employees and applicants for employment without regard  to race, color, religion, gender, sexual orientation, gender identity or expression, national origin, age, disability, genetic information, marital status, amnesty, or status as a covered veteran in accordance with applicable federal, state and local laws. We especially invite women, minorities, veterans, and individuals with disabilities to apply. EEO/AA/M/F/Vet/Disability.”

SoC Design Verification Engineer1Python,UVM,Verilog,SOC,Design Verification,CPUN/AFull TImeUnited States