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Senior ASIC Verification Engineer - W2 Role - 100% Remote (US)

Info Dinamica IncAK🇺🇸United StatesPosted 20 Jul 2026

Why This Role Stands Out

This fully remote Senior ASIC Verification Engineer role offers a fantastic opportunity to contribute to the entire silicon development lifecycle, from concept to bring-up, with a focus on cutting-edge compute subsystems. You'll thrive here if you have a strong foundation in digital electronics and ASIC/FPGA/SoC fundamentals, and enjoy collaborating across teams to deliver innovative solutions. Embrace the chance to grow your skills and make a significant impact in a dynamic, customer-facing environment.

Quick Overview

Work Type
Remote
Level
Mid Senior

Job Description

Role: Senior ASIC Verification Engineer
100% Remote (US)
Job Type: W2 Contract
Must Have: Solid grounding in digital electronics, logic design, and ASIC/FPGA/SoC fundamentals
About the Role:
You will join a digital hardware team and contribute across the full silicon development lifecycle - from preliminary analysis and micro-architecture definition through RTL development, functional verification, ASIC/FPGA/SoC implementation, on-hardware bring-up, and design documentation. Engineers are expected to be customer-facing: presenting technical solutions, gathering and documenting requirements, and supporting both PoC and production phases.
Responsibilities:
  • Develop UVM/SystemVerilog testbenches and verification IP for high-performance compute subsystems: systolic arrays, vector/tensor datapaths, memory hierarchies, DMA engines, and control logic
  • Define verification plans, test strategies, and coverage goals (functional, code, assertion); drive closure to sign-off criteria
  • Build constrained-random and directed tests for ML datapath correctness: GEMM, convolutions, attention, mixed-precision arithmetic, and accumulation behavior
  • Verify power-management behavior: clock/operand gating, power islands, DVFS transitions, idle/wake sequences, and coordination with firmware-controlled policies
  • Create and maintain SVA assertions, scoreboards, reference models, and checkers for protocol and datapath integrity (AXI/CHI/NOC, DMA, memory interfaces)
  • Run block- and SoC-level simulation regressions; debug failures using waveforms, logs, and cross-team RTL reviews
  • Partner with RTL, architecture, firmware, and software teams on hardware software co-verification and early emulation/FPGA bring-up
  • Contribute to low-power verification methodology: activity checks, power-state coverage, and correlation of pre-silicon models with post-silicon power measurements
Core Skills & Qualifications:
  • BSc/MSc in Electronics, Radio Engineering, Computer Engineering, or related field
  • Solid grounding in digital electronics, logic design, and ASIC/FPGA/SoC fundamentals
  • Experience taking a design through the full lifecycle on real hardware (FPGA, SoC, or ASIC)

Skills

FPGA

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