Haystack
← Back to Jobs
Temporary/Casual
Engineering

ASIC Engineer

eTeam Workforce LimitedFarnborough, Hampshire🇬🇧United KingdomPosted 4 Aug 2026

Why This Role Stands Out

This hybrid ASIC Engineering role offers a fantastic opportunity to leverage your extensive RFIC and AMS simulation expertise within a reputable company, contributing to critical transceiver chain verification. You'll thrive if you possess a strong background in Verilog-A and Verilog-AMS, with the chance to further develop your skills in a collaborative environment. Apply now to join a dynamic team and make a significant impact on cutting-edge designs!

Quick Overview

Work Type
Hybrid
Schedule
Temporary/Casual
Level
Mid Senior

Job Description

Title: ASICS Engineering

Duration: Sep 7, 2026 - Mar 5, 2027

Hours Per Week: 37.00

Location: Farnborough

TECHNICAL SKILLS:

Must Have:

  • 5+ year of RFIC work experience
  • AMS simulations
  • Experience of verification simulations of complete transceiver chains RF -> Analogue
  • Verilog-A
  • Verilog-AMS

Nice To Have:

  • Digital verification skills

The senior engineer will take on the verification of full Rx and Tx chains of an on-going design.

They will help setup and debug simulation testbenches, report compliance to spec and validate device register controls for test.

The tasks will include:

Review of block specifications.

Simulation and reporting compliance to specifications.

Root cause any specification failures.

Liaising with the chip lead to integrate the designs.

Presentation of design for block-level reviews.

Skills

Verilog

Similar jobs

Browse related jobs

Apply now