← Back to Jobs
Engineering
Engineer Digital 3
Judge Group, Inc.San Diego, CA🇺🇸United StatesPosted 8 Jul 2026
Quick Overview
Salary
$100 - $130/hr
Work Type
On Site
Level
Mid Senior
Job Description
Location: San Diego, CA Salary: $100.00 USD Hourly - $130.00 USD Hourly Description:
We are looking for you to join our team as a Digital Engineer on site in San Diego, CA.
Responsibilities:
Design, develop, integrate and test VHDL-based digital designs for our end-user customers and businesses, primarily focused on software defined radio VHDL firmware code bases.
Work using FPGA programming development tools and environments
Work with multi-disciplinary teams, such as with Systems Engineering, Digital Engineering, Hardware, and Integration & Test
Work in waterfall or Agile software development environment
Analyze system concept of operation, requirements and design documents to resolve functional, performance or timing issues.
Basic Qualifications for Digital Engineer:
BS + 5 years of experience in related STEM field; MS + 3 years of experience.
Significant hands-on current experience in the field of VHDL design.
Candidate must have excellent written and communication skills and be able to work independently and within groups.
Candidate must have working knowledge of formal engineering development process, VHDL design and verification.
Preferred Qualifications for Digital Engineer:
8 or more years of professional technical experience.
Experience with VHDL design and OSVVM verification for FPGA firmware
Experience with AMD/Xilinx series including Zynq, Kintex, Ultrascale, Versal family of devices.
Experience with Communication Protocols (I2C, SPI, UART, PCIe, Ethernet)
Experience with Electronic Design Automation (EDA) tools: Vivado, Quartus, QuestaSim
Knowledgeable in FPGA physical constraints and achieving timing closure.
Generation of Test benches and support of formal VHDL Verification.
Experience with board RO system level debug using test equipment such as oscilloscopes and logic analyzers.
Experience with translating systems requirements into programmable logic requirements, design documents, and test specifications.
Candidate should have hands on experience with DoD communications systems.
By providing your phone number, you consent to: (1) receive automated text messages and calls from the Judge Group, Inc. and its affiliates (collectively "Judge") to such phone number regarding job opportunities, your job application, and for other related purposes. Message & data rates apply and message frequency may vary. Consistent with Judge's Privacy Policy, information obtained from your consent will not be shared with third parties for marketing/promotional purposes. Reply STOP to opt out of receiving telephone calls and text messages from Judge and HELP for help.
Contact:
This job and many more are available through The Judge Group. Please apply with us today!
We are looking for you to join our team as a Digital Engineer on site in San Diego, CA.
Responsibilities:
Design, develop, integrate and test VHDL-based digital designs for our end-user customers and businesses, primarily focused on software defined radio VHDL firmware code bases.
Work using FPGA programming development tools and environments
Work with multi-disciplinary teams, such as with Systems Engineering, Digital Engineering, Hardware, and Integration & Test
Work in waterfall or Agile software development environment
Analyze system concept of operation, requirements and design documents to resolve functional, performance or timing issues.
Basic Qualifications for Digital Engineer:
BS + 5 years of experience in related STEM field; MS + 3 years of experience.
Significant hands-on current experience in the field of VHDL design.
Candidate must have excellent written and communication skills and be able to work independently and within groups.
Candidate must have working knowledge of formal engineering development process, VHDL design and verification.
Preferred Qualifications for Digital Engineer:
8 or more years of professional technical experience.
Experience with VHDL design and OSVVM verification for FPGA firmware
Experience with AMD/Xilinx series including Zynq, Kintex, Ultrascale, Versal family of devices.
Experience with Communication Protocols (I2C, SPI, UART, PCIe, Ethernet)
Experience with Electronic Design Automation (EDA) tools: Vivado, Quartus, QuestaSim
Knowledgeable in FPGA physical constraints and achieving timing closure.
Generation of Test benches and support of formal VHDL Verification.
Experience with board RO system level debug using test equipment such as oscilloscopes and logic analyzers.
Experience with translating systems requirements into programmable logic requirements, design documents, and test specifications.
Candidate should have hands on experience with DoD communications systems.
By providing your phone number, you consent to: (1) receive automated text messages and calls from the Judge Group, Inc. and its affiliates (collectively "Judge") to such phone number regarding job opportunities, your job application, and for other related purposes. Message & data rates apply and message frequency may vary. Consistent with Judge's Privacy Policy, information obtained from your consent will not be shared with third parties for marketing/promotional purposes. Reply STOP to opt out of receiving telephone calls and text messages from Judge and HELP for help.
Contact:
This job and many more are available through The Judge Group. Please apply with us today!
Skills
FPGA
Agile
VHDL
Similar jobs
Industrial Engineer 3
Judge Group, Inc. · Hazelwood, United States
1 minute agoMechanical Engineer II
PTR Global · Seattle, United States
2 minutes ago$50 - $55/hrStaff Semiconductor Process Engineer
Lockheed Martin Corporation · Goleta, United States
9 minutes ago$113.9k - $200.9k/yrMDM Engineer
Judge Group, Inc. · Plano, United States
27 minutes ago$130k/yrPrincipal Wireless / WiFi engineer
Judge Group, Inc. · Cherry Hills Village, United States
27 minutes ago$135k/yrDesign and Analysis Engineer 3
Judge Group, Inc. · Long Beach, United States
27 minutes ago$70 - $71/hr