Senior FPGA Design Engineer job opportunity at Fullerton, CA

Indotronix is seeking a Senior FPGA Design Engineer for a Job Opportunity in Fullerton, CA

 

Job Title: Senior FPGA Design Engineer
Location:  Fullerton, CA
Duration:  12 Months Contract
Pay Rate:  $113.63/hr on W2

 

Note: Need Active Secret clearance at start  
 
Job Description
Design & Architecture:
- Requirements capture and development of FPGA/ASIC digital architectures  
- RTL design and implementation in VHDL or Verilog  
- Timing analysis and closure on high‑speed digital systems  
- Resource trade‑off analysis and design optimization  

 

Verification:
- Testbench development using VHDL or SystemVerilog / UVM  
- Functional verification of RTL blocks and subsystems  
- Support constrained-random, functional coverage, and best‑practice verification methodologies  

 

Integration & Lab Work:
- Hands-on FPGA/ASIC validation using advanced lab equipment  
- Work within secure, air‑gapped environments for system bring-up  
- Integration support with multidisciplinary engineering teams  

 

Required Qualifications
- Active Secret clearance at start  
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field  
- Expertise in FPGA design and/or verification  
- Strong VHDL experience  
- Proficiency with Intel/Altera FPGA tools (preferred), Modelsim, Synopsys, and/or FPGA vendor toolchains  
- Experience with high‑speed digital systems, interfaces, and signal processing  
- Ability to work independently and communicate clearly in documentation and presentations  
- Strong hands‑on lab experience (non‑negotiable)  

 

Desired Skills
- SystemVerilog + UVM verification  
- ASIC experience (nice-to-have)  
- Design-for-Test (DFT) and manufacturability knowledge  
- Unix/Linux, scripting, C/C++, or Perl experience