ASIC Verification Engineer
Why This Role Stands Out
This remote ASIC Verification Engineer role offers significant growth potential by engaging you in the full silicon development lifecycle, from micro-architecture to on-hardware bring-up, with opportunities to present technical solutions to clients. You'll thrive here if you possess a strong foundation in digital electronics and logic design, and excel in developing UVM/SystemVerilog testbenches for high-performance compute subsystems. Embrace this chance to build valuable experience within a dynamic team.
Quick Overview
Job Description
Role: ASIC Verification Engineer
Duration: Long-term Contract
Location: Remote
Must-Have: Solid grounding in digital electronics, logic design, and ASIC/FPGA/SoC fundamentals
About the Role:
You will join a digital hardware team and contribute across the full silicon development lifecycle from preliminary analysis and micro-architecture definition through RTL development, functional verification, ASIC/FPGA/SoC implementation, on-hardware bring-up, and design documentation. Engineers are expected to be customer-facing: presenting technical solutions, gathering and documenting requirements, and supporting both PoC and production phases.
Responsibilities:
- Develop UVM/SystemVerilog testbenches and verification IP for high-performance compute subsystems: systolic arrays, vector/tensor datapaths, memory hierarchies, DMA engines, and control logic.
- Define verification plans, test strategies, and coverage goals (functional, code, assertion); drive closure to sign-off criteria.
- Build constrained-random and directed tests for ML datapath correctness: GEMM, convolutions, attention, mixed-precision arithmetic, and accumulation behavior.
- Verify power-management behavior: clock/operand gating, power islands, DVFS transitions, idle/wake sequences, and coordination with firmware-controlled policies.
- Create and maintain SVA assertions, scoreboards, reference models, and checkers for protocol and datapath integrity (AXI/CHI/NOC, DMA, memory interfaces).
- Run block- and SoC-level simulation regressions; debug failures using waveforms, logs, and cross-team RTL reviews..
- Partner with RTL, architecture, firmware, and software teams on hardware software co-verification and early emulation/FPGA bring-up.
- Contribute to low-power verification methodology: activity checks, power-state coverage, and correlation of pre-silicon models with post-silicon power measurements.
Core Skills & Qualifications:
- BSc/MSc in Electronics, Radio Engineering, Computer Engineering, or related field
- Solid grounding in digital electronics, logic design, and ASIC/FPGA/SoC fundamentals
- Experience taking a design through the full lifecycle on real hardware (FPGA, SoC, or ASIC)
Skills
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